The present invention relates to processing a plurality of data channels using a pipeline structure, e.g., for a power control and measurement for communications channels in a CDMA communications system.
In the past, the processing speed of computers and computer systems has already been significantly increased. However, there is still need for ever higher processing capabilities. For example, today""s mobile telecommunications systems are required to handle a potentially very large number of subscribers, which need to be serviced with a limited number of communication channels. Highly complex transmission and channel access schemes are employed for providing services, requiring very high computation capabilities.
A class of transmission schemes provides transmission of a large number of communication channels containing voice or data signals via the same transmission medium. Here, different channels are transmitted, e.g. in a radio frequency band, in such a way that they overlap in the time domain as well as in the frequency domain. A well-known access scheme of this class is CDMA (Code Division Multiple Access).
In CDMA, since all channels are transmitted together, it is required that each individual communication channel signal is distinguishable from other communication channel signals. Therefore, each communication signal is individually encoded with one or more unique spreading codes, as it is well known in the art. To compensate different spreading gains and assure a good quality of service, the transmission power of each spread channel is then individually adjusted, i.e., power weighted. Thereafter, the spread communication channels are combined into a single transmission signal to be transmitted, e.g., via the air interface.
After receiving the transmission signal at a receiving station, e.g., a mobile station, the communication channel signal intended for this station may be extracted by performing a decoding process, e.g., with the same code sequence as it was used for spreading the communication channel signal before transmission.
Mobile stations talking via the same transmission path, e.g., a CDMA channel, will be located indoors or outdoors and at different distances from an associated base station. Consequently, the transmission signal will be attenuated differently and some mobile stations will encounter difficulties in recovering information from the transmission signal intended for them.
Similarly, to avoid the above reception difficulties, as indicated above, the communication channel signals intended for remote or occluded receiving stations need to be amplified to a higher degree than the remaining communication channel signals for receiving stations located closer to the sending station. Hence, an adaptive adjustment of the transmission power of each channel needs to be performed, depending on the attenuation or quality of the radio signal received at the respective mobile station.
Therefore, prior to combining individually spread communication channels into a single transmission signal, each communication channel signal is individually weighed in order to increase or decrease its relative power in the combined transmission signal. The weighting factor for adjusting the power of a communication channel signal may be determined from the receiving quality at the corresponding receiving station.
Suppose, a target receiving quality has been chosen. If the actual receiving quality is below the target quality, the sender is instructed to increase its transmit power, e.g. increase the weighting factor. On the other hand, if the receiving quality is above the target quality, a decrease of the weighting factor may be ordered.
This command (up or down command) may be transmitted from the receiving station to the sending station, enabling the sending station to individually adjust the power levels of each communication channel signal before combining all communication channels into the transmission signal.
Further, in order to adjust power levels of communication channels for facilitating an adequate power control, the overall power of each individual power control communication channel may be measured.
In a CDMA base station, where a large number of channels is to be combined, very high frequencies are encountered and further, time delays for transmission need to be kept at a minimum. Therefore, since the power control, i.e. the weight adjustment, must be performed on all individual communication channels, demands on a hardware solution are high.
It is known in computing, in order to attain a higher data throughput, to parallelize processing tasks. Hence, it is conceivable to perform a power control and measurement for all channels individually and in parallel. However, since in a telecommunications system potentially very large numbers of communication channels needs to be serviced, associated hardware costs will be extremely high.
It is therefore object of the invention to process a plurality of data channels at reduced hardware costs, while maintaining a high processing speed and short time delay.
This object of the invention is solved by an apparatus for processing a plurality of data channels with unique channel addresses using a pipeline structure having plurality of pipeline stages, comprising addressing means for transmitting channel addresses between the pipeline stages, including time delay means associated with each of the pipeline stages, for time delaying the transmission of the channel addresses between pipeline stages, memory means included into at least one of the pipeline stages and connected to the addressing means, for storing, at a plurality of locations corresponding to respective channel addresses, data associated with each of the plurality of data channels, and processing means included into at least one of the pipeline stages, for processing at least data stored in the memory means at locations specified by the channel addresses.
The object of the invention is further solved by an apparatus for processing a plurality of data channels with unique channel addresses using a pipeline structure having plurality of pipeline stages, comprising addressing means for transmitting channel addresses between the pipeline stages, including time delay means associated with each of the pipeline stages, for time delaying the transmission of the channel addresses between pipeline stages, memory means included into at least one of the pipeline stages and connected to the addressing means, for storing, at a plurality of locations corresponding to respective channel addresses, data associated with each of the plurality of data channels, the memory means including a current weight storing unit storing a current weight associated with each of the data channels and a step size storing unit storing a step size associated with each of the data channels, and processing means included into at least one of the pipeline stages, for processing at least data stored in the memory means at locations specified by the channel addresses, including adjusting means for incrementing or decrementing the current weight by the step size in accordance with an indicator indicating whether the channel power is to be increased or decreased.
The object of the invention is also solved by and apparatus for processing a plurality of data channels with unique channel addresses using a pipeline structure having plurality of pipeline stages, comprising addressing means for transmitting channel addresses between the pipeline stages, including time delay means associated with each of the pipeline stages, for time delaying the transmission of the channel addresses between pipeline stages, memory means included into at least one of the pipeline stages and connected to the addressing means, for storing, at a plurality of locations corresponding to respective channel addresses, data associated with each of the plurality of data channels, the memory means including a first storage unit for storing a current weight associated with each of the data channels and a second storage unit for storing accumulated channel weights associated with each of the data channels, and processing means included into at least one of the pipeline stages, for processing at least data stored in the memory means at locations specified by the channel addresses.
Still further, the object of the invention is solved by a method for processing a plurality of data channels with unique addresses using a pipeline structure having a plurality of pipeline stages and including addressing means for transmitting channel addresses between the pipeline stages, memory means for storing at a plurality of locations corresponding to respective channel addresses, data associated with the plurality of data channels, and processing means for processing at least channel specific data stored in the memory means at locations specified by the channel addresses, the method comprising the steps of: receiving a channel address of a data channel at a first pipeline stage via the addressing means, reading data associated with the channel address from the memory means, transmitting the read data and the channel address to a second pipeline stage, processing the data at the second pipeline stage, and forwarding the channel address and the processing result to a third pipeline stage.
The object of the invention is further solved by a method for processing a plurality of data channels with unique addresses using a pipeline structure having a plurality of pipeline stages and including addressing means for transmitting channel addresses between the pipeline stages, memory means for storing at a plurality of locations corresponding to respective channel addresses, data associated with the plurality of data channels, and processing means for processing at least channel specific data stored in the memory means at locations specified by the channel addresses, the method comprising the steps of: receiving a channel address of a data channel at a first pipeline stage via the addressing means, reading data associated with the channel address from the memory means, including a step size and a current weight associated with one of the data channels, transmitting the read data and the channel address to a second pipeline stage, processing the data at the second pipeline stage, including incrementing or decrementing the current weight by the step size, in accordance with an indicator indicating whether the power is to be increased or decreased, and forwarding the channel address and the processing result to a third pipeline stage.
Finally, the object of the invention is solved by a method for processing a plurality of data channels with unique addresses using a pipeline structure having a plurality of pipeline stages and including addressing means for transmitting channel addresses between the pipeline stages, memory means for storing at a plurality of locations corresponding to respective channel addresses, data associated with the plurality of data channels, and processing means for processing at least channel specific data stored in the memory means at locations specified by the channel addresses, the method comprising the steps of: receiving a channel address of a data channel at a first pipeline stage via the addressing means, reading data associated with the channel address from the memory means, including an accumulated channel weight and a current channel weight associated with one of the data channels, and transmitting the read data and the channel address to a second pipeline stage, processing the data at the second pipeline stage, including comparing two channel addresses subsequently transmitted via the addressing means, and performing an add operation on a value received from the first storage unit and a value received from the second storage unit using a current channel address in case of inequality of the two subsequent addresses and for performing an add operation on a previous output value of the adding circuit and a value received from the first storage unit in case of equality of the two subsequent addresses, and forwarding the channel address and the processing result to a third pipeline stage.
According to the invention, a plurality of pipeline stages for performing operations in each on clock cycle are provided with addressing means for transmitting channel addresses between pipeline stages, wherein the addressing means advantageously comprises time delay means associated with each of the pipeline stages for time delaying the transmission of the channel addresses between pipeline stages.
The inventive concept may, e.g., be applied to perform a weight adjustment and a power measurement on a plurality of data channels, for example, CDMA channels.
The invention advantageously allows to perform a pipeline type processing of data associated with the channels, e.g., channel weights of the plurality of data channels in an interleaved fashion. Each stage may retrieve data associated with the data channels from memory means using an address transmitted via the addressing means. Since the addresses are appropriately time delayed between subsequent stages in accordance with a time delay introduced while processing steps are performed on channel weights within respective pipeline stages. Thus, each stage will receive information regarding a particular channel for processing together with the correct channel address transmitted via the addressing means. Accordingly, a particular stage may advantageously process a channel weight from a first channel together with data associated with the first channel retrieve using an address received from the addressing means, a second pipeline stage may process a channel weight corresponding to a second channel together with data associated with the second channel received from the memory means using the address of the second data channel transmitted via the addressing means. The invention allows to advantageously use the fact that the power regulating period of a particular channel is much longer than the needed processing time.
The memory means may be comprised of a step size storing unit for storing a step size value associated with each of the data channels and may further comprise a current weight storing unit for storing a current weight associated with each of the data channel.- The processing means may include adjusting means for incrementally adjusting a current weight, i.e., incrementing or decrementing the current weight by the step size, thus advantageously allowing an approximation of the channel weight to the required power level.
The adapted current weights may be stored in the current weight storage unit using the appropriately delayed channel addresses.
Further, one of the pipeline stages may comprise a limit storage means for storing upper and/or lower weight limits corresponding to each of the plurality of channel addresses in case an adapted channel weight exceeds the upper or lower limit associated with a particular channel, the channel weight may be limited accordingly. Again, the correct address, corresponding to a channel weight subjected to limit computation, will be obtained from the addressing means, which appropriately delays the transmission of channel addresses. A limit operation may be performed only with an upper limit and/or a lower limit.
A step size setting unit may be provided for periodically updating the step sizes stored in the step size storage unit, or to give different channels different step sizes.
Advantageously, the invention further allows to compute average power values for the individual data channels by providing a first and second storage unit for storing current weights and accumulated weights associated with each of the data channels.
An address comparison circuit may be provided for comparing two channel addresses subsequently transmitted via the address means. An adding circuit may perform an add operation on a current weight received from the first storage unit and an accumulated weight received from the second storage unit using a current channel address in case of inequality of the two subsequent addresses and may perform an add operation on a previous output value of the add circuit and a current weight received from the first storage unit in case of equality of the two subsequent addresses. Thus, an accumulative power value may be obtained for a particular channel, even if two subsequent power values of this channel are processed according to the invention.
In case power weights of different data channels are transmitted sequentially and processed by the inventive pipeline structure, the current weight received from the first storage unit will be added to the accumulated weight received from the second storage unit.
The result of the add operation may advantageously be stored as a new accumulative power value in the first storage unit using the appropriately time delayed current address.
Advantageously, a channel spreading unit may be provided, arranged to spread the channel signals after channel power adjustment and/or a channel power measurement is performed, thus exploiting the fact, that spreading of a channel does not affect the power level.
In case the memory means allows simultaneous read and write operations, an accumulative power value of a channel may be stored in the memory means, while simultaneously an accumulative power value of another channel is retrieved from the memory means. Similarly, an adapted channel weight of a particular channel may be stored in the current weight storage unit while simultaneously a current weight of another channel is read from the current weight storage unit.
Further advantageous embodiments of the invention become obvious with further dependent claims.